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FPU condition codes O/U# = stack over/underflow if
(status word bits 14,10,9,8) stack exception bit set
+-------------------------------+
Instruction | C3 | C2 | C1 | C0 | Interpretation
-----------------------+-------------------------------+--------------------
FCOM, FCOMP, FCOMPP, | 1 | Zero result or O/U#
FUCOM, FUCOMP, | 0 0 0 | ST > operand
FUCOMPP, FICOM, | 0 0 1 | ST < operand
FICOMP, FTST | 1 0 0 | ST = operand
| 1 1 1 | Undefined/unordered
| 1 | Not comparable
-----------------------+-------------------------------+--------------------
FCOMI, FCOMIP, | | 1 | Unde- | O/U#
FUCOMI, FUCOMIP | Undefined | | fined |
-----------------------+-------------------------------+--------------------
FXAM | 1 | Sign or O/U#
| 0 0 0 0 | +Unnormalized
| 0 0 1 0 | -Unnormalized
| 0 1 0 0 | +Normalized
| 0 1 1 0 | -Normalized
| 1 0 0 0 | +0
| 1 0 1 0 | -0
| 1 1 0 0 | +Denormalized
| 1 1 1 0 | -Denormalized
| 0 0 0 1 | +NaN
| 0 0 1 1 | -NaN
| 0 1 0 1 | +Infinity
| 0 1 1 1 | -Infinity
| 1 1 | Empty register
-----------------------+-------------------------------+--------------------
FABS, FCHS, FXCH, | | 1 | | Zero result or O/U#
FDECSTP, FINCSTP, | | | |
FXTRACT, FLD, FILD, | Undefined | | Unde- |
FBLD, FSTP (80 bit), | | | fined |
constant loads | | | |
-----------------------+---------------+-------+-------+--------------------
FST, FSTP (< 80 bit), | | 1 | | Roundup or O/U#
FBST, FIST, FRNDINT, | | | |
FADD, FDIV, FDIVR, | | | |
FMUL, FSUB, FSUBR, | Undefined | | Unde- |
F2XM1, FPATAN, FSCALE, | | | fined |
FSQRT, FYL2X, FYL2XP1, | | | |
FCMOVcc | | | |
-----------------------+-----------------------+-------+--------------------
FPTAN, FSIN, FCOS, | | 0 | | Reduction complete
FSINCOS | Unde- | 1 | Unde- | Reduction incomplete
| fined | ? | fined | Undefined if C2=1
| | 1 | | Roundup or O/U#
-----------------------+-------------------------------+--------------------
FPREM, FPREM1 | 0 | Reduction complete
| 1 | Reduction incomplete
| 1 | O/U#
| Q0 Q1 Q2 | Quotient L.O. bits
-----------------------+-------------------------------+--------------------
FLDENV, FRSTOR | Loaded from memory |
-----------------------+-------------------------------+--------------------
FINIT, FSAVE | Cleared to zero |
-----------------------+-------------------------------+--------------------
FLDCW, FSTCW, FSTSW, | |
FSTENV, FCLEX | Undefined |
-----------------------+-------------------------------+--------------------
| C3 | C2 | C1 | C0 |
+-------------------------------+
See Also: FPU registers
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