MAKE
The  Zortech  MAKE utility, inspired by the UNIX utility of  the  same
name, is a full-featured MAKE for MSDOS. Features include macros, full
dependency  checking, MSDOS internal commands, and  descriptive  error
messages.

What is MAKE?
MAKE  is  a  utility that automates program  maintenance.  Instead  of
explicitly typing in commands to compile and link your program(s),  it
is possible to write all of the steps necessary in a text file  called
makefile then just give the command MAKE when you wish to compile  and
link.

The steps to producing the executable file would be:

1.Compile the source program into an object program.
2.Link  the  object program with the C++ library.  MAKE  differs  from
batch processing in that it  performs only the required actions, while
a batch file will execute all tasks, whether they are needed or not.

Format of the makefile:

TARGET-FILE :  DEPENDENT-FILE DEPENDENT-FILE2
               COMMAND 1
               COMMAND 2

An Example makefile

hello.exe:hello.obj           #Target/Dependence line
          ZTC hello.obj       #Command/Rule line

hello.obj:hello.cpp           #Target line
          ZTC -c hello.cpp    #Command line

This  shows  how  to create a makefile for a program  written  in  one
source  file only. In the above example the target is hello.exe  which
depends  on hello.obj which in turn depends on hello.cpp.  MAKE  first
checks  if  the  date  and  time of  hello.cpp  is  more  recent  than
hello.obj. If it is more recent, or if hello.obj does not exist,  then
the  command line ZTC -c hello.cpp is carried out. This will create  a
new  hello.obj  which  means  that this will now  be  newer  than  any
existing  hello.exe so the command ZTC hello.obj will also be  carried
out. To use the above makefile you would just type MAKE.

Dependency Files
Dependency files are all the source files that, when changed, cause  a
change  in their resulting target files. For example, modifying a  C++
source file will cause the object file resulting from the  compilation
to  change. But the source file may not be the only  dependency.  When
the  source file includes other files, then these included  files  are
also dependency files. An example would be the line

#include "defs.hpp"
in  a  source  file  prog.cpp. This would MAKE  the  file  defs.hpp  a
dependency. The makefile line would be:

prog.obj: prog.cpp defs.hpp

which means that prog.obj depends on prog.cpp and defs.hpp.